The present invention relates to a semiconductor integrated circuit chip to be bonded through bumps onto a circuit board, and more particularly to a sealing structure for bumps formed on a semiconductor integrated circuit chip to be bonded through the bumps onto a circuit board.
A conventional structure of a semiconductor integrated circuit chip 1 to be bonded through bumps 7 onto a circuit board 11 is as illustrated in FIG. 1. The chip 1 is formed thereon with a plurality of pads 2. An insulation film 9 is formed on an entire surface of the chip 1 and has a plurality of openings. Each of the openings is positioned just over each of the pads 2 to allow at least a part of each pad 2 to be exposed through each of the openings. A plurality of metal films 5 are formed, each of which is selectively formed on an exposed part of the each pad 2 and on a side wall of the each opening as well as on a top surface of the insulating film 9 but only in the vicinity of the each opening. A plurality of bumps 7 are formed just on the metal films 5 so as to be electrically connected through the metal films 5 to the pads 2. At this stage, each the bump 7 is exposed to an atmosphere including free particles of dusts. In the next step, as illustrated in FIG. 2, a top portion of each of the bumps 7 is jointed by reflow with each of a plurality of pads 12 provided on a circuit board 11 onto which the chip will be bonded. As illustrated in FIG. 2, the circuit board 11 is spaced through the bumps 7 from the chip 1. Namely, there is a space between the chip 1 and the circuit board 11, for which reason the space is sealed with an epoxy resin film 13.
The above conventional semiconductor integrated circuit chip is, however, engaged with the following problem. The surfaces of the bumps 7 are unavoidably exposed to the atmosphere including free particles of dusts until the space between the chip 1 and the circuit board 11 thereby the surfaces thereof tend to be contaminated or oxidized by the atmosphere. This may raise a serious issue of the difficulty in ensuring that the bumps 7 provide electrical contacts between the pads on the chip 1 and on the circuit board 11. Such difficulty may reduce a yield in manufacturing of the products and a reliability of the products.